XUPV2P and EDK 10.1

[Database Administrator]

Hi all,
I'm glad to see that the XUPV2P board is now supported by EDK 10.1.
However, setting the MPCM memory controller to work seems complex and
up to now I hadn't success (256 MB DDR DIMM memory module correctly
working before with the standard PLB and OPB controllers). I set up
parameters like the previous controllers and the clocking has been
realized following Xilinx guide, but I cannot make it work... Any one
had success with that?

Thank you very much!

Bye and thanks!!!

[Database Administrator]

On 30 Apr, 09:00, Antony wrote:
> Hi all,
> I'm glad to see that the XUPV2P board is now supported by EDK 10.1.
> However, setting the MPCM memory controller to work seems complex and
> up to now I hadn't success (256 MB DDR DIMM memory module correctly
> working before with the standard PLB and OPB controllers). I set up
> parameters like the previous controllers and the clocking has been
> realized following Xilinx guide, but I cannot make it work... Any one
> had success with that?

Hello,
made it work
now it is ok, just a little tuning of the parameters.

Bye!

[kmawjood]

Hello Antony,

I am using EDK 10.1 and XUPV2P board and I have a similar problem as yours.
The error that I received is:
DDR_SDRAM is not a valid IP for parameter main-memory.

Please could you let me know how you made it works.

Thanks,
Kais