purpose of MULTAND

[Database Administrator]

On 2008-11-14, Jan Bruns wrote:
> I've read somewhere about the MULTAND allowing to build an adder with
> an additional enable input for one of the summands.

I haven't looked into the MULTAND usage for multipliers much, but I
have seen some other nice usage examples of it:

It allows you to implement (a&b) + (c&d) using only one lut / bit.

This can be good if you want to implement an adder with two possible
inputs for each operand. (Assuming that you can arrange the unused
input to be set to 1 using for example the set signal of the flip-flops
in the previous pipeline stage.)


I saw another neat use case on the fpga-cpu mailing list at
http://www.embeddedrelated.com/group.../show/2801.php where
Göran Bilski explains how the ALU in the microblaze works. By using
MULTAND it is possible to get the following functionality using only
one lut per bit: B+A, B-A, B and A


Has anyone seen any other nice use case for MULTAND?

/Andreas

[Database Administrator]

Hallo.

I don't remeber the purpose of the MULTAND (found in many xilinx fpgas), and
I hate not understanding such simple things.

I've read somewhere about the MULTAND allowing to build an adder with
an additional enable input for one of the summands.

But it seems to me this can still be done without the MULTAND using this setup:

LUT(a,b,ben) := a xor (b and ben);
CYMUX(sel,d1,d0) := (sel) ? d1 : d0;
SUM(a,b,ben,cin) := LUT(a,b,ben) xor cin;
COUT(a,b,ben,cin) := CYMUX(LUT(a,b,ben),cin,a);

So the main purpose probably is to allow for an adder with enable bits
for both summands, but I actually don't see how this would aid in
building multipliers, except maybe for the outer, initial stage
(am I missing something, or is this really the main purpose?).

Gruss

Jan Bruns

[Database Administrator]

"Andreas Ehliar":
> Has anyone seen any other nice use case for MULTAND?

Not tested:

Let BX=0, F= -(f3 & f4).

XB = (f1 & f2) & (f3 & f4)

giving the option to route a partial, inverted and2, when using an and4,
where the and4 can optionally be xored with lutG.


BTW, I'm not sure about the polarity of Spartan3 F5MUX (from the
FPGA-Editor, it isn't clear if it's sel-polarity can be chosen
independent of the programmable BX inverter, and what the actual
polarity chooses).

Gruss

Jan Bruns